Intel’s Xe line of GPUs is progressing extremely well according to Raja Koduri, as he outlines the companies graphics and compute vision at the Intel HPC Developer Conference.
Of course, Raja Koduri used to be the head of Radeon Technologies Group but departed to team Intel to spearhead their move into discrete graphics solutions.
Taking to the stage, Mr. Koduri provided a glimpse into Intel’s Graphics roadmap, and what the company was planning across different market sectors.
Intel’s Xe will broadly be a single architecture but will be split into many different microarchitectures depending upon the intended usage of the product.
Intel Xe LP (Low Power) is lower power GPUS, operating in a typical power envelope of between 5-20W, though it can be up to a max of 50W.
These parts will push lower power consumption and smaller die size, because clearly in the mobile/integrated space efficiency and power consumption is important.
Intel Xe HP (High Power) will likely be the GPUs gamers will be interested in, targeting enthusiast gaming, but also offering products for Datacenter too. As the name implies, the TDP is much higher, up to 250W.
Finally, there is Intel Xe HPC (HPC Exascale), which didn’t have TDP numbers touted but will be specifically designed for a no-compromise solution for the supercomputers.
“The Xe is the one architecture with all the features and capabilities that trickle up and down between all the microarchitectures…” said Ari Rauch, VP of architecture, graphics, and software. “Yes, you will migration of capabilities between microarchitectures. That’s the whole idea of having one Xe architecture.”
Intel’s Ponte Vecchio (named after a bridge in Florence, Italy for those wondering) is what Intel considers an ‘Exascale Class’ graphics solution. It will be crafted on Intel’s 7nm process (featuring twice the density scaling of its own 10nm process) and chiplets.
Essentially, it will leverage Intel’s Foveros/Die stacking which will be connected via Intel’s EMIB technology. In multi-GPU solutions, Intel will provide GPU-to-GPU communication thanks to CXL (Compute eXpress Link), which leverages the PCIe 5 protocol.
What this basically means is that Intel won’t produce a single, large monolithic die, but instead use chiplets similar to how AMD does for its Zen 2 products. We know that eventually AMD and Nvidia will use chiplets for its GPUs too, but in the here and now, Intel is the only one of the 3 companies to confirm they’re ‘doing it’.
The EMIB technology will be used to connect the GPUs themselves directly to the HBM packages (although, I think on gaming GPUs, this approach will differ a little).
Intel also confirmed that their Xe GPUs will feature variable vector width too. Here’s what Ponte Vecchio is capable of:
SIMT (Single Instruction Multi Thread – like a traditional GPU)
SIMD (Single Instruction Multi Data – More like a CPU)
SIMT + SIMD (a mixture of the two).
A single slide from Intel tells the story really – grabbed by TomsHardware, we are looking at thousands of EU (Execution Units) per card (once again, not a single chip) and each EU offers 40x the double-precision floating-point performance.
High-performance GPUs are great and all, but they need something – data. Memory bandwidth is a critical component in a GPU… don’t believe me? Open MSI afterburner on your system at home, benchmark your GPU with stock settings in something like say, SuperPosition, then put the memory clock speeds at their lowest settings, apply it and run the benchmark again. But imagine that, but compounded by chiplets without the ability to send data to each other effectively in a chiplet design.
To this end, Intel uses their XEMF (XE Memory Fabric) which glues both the memory and GPU chiplets in a coherent memory interface. Intel claims this can scale to ‘thousands’ of nodes. We also have a Rambo cache (please email me your memes), which is claimed will mean that both the CPU and GPUs in a system will have access to huge pools of memory bandwidth.
Eagle-eyed readers will note that there are several specifics missing here – such as small details like the number of Execution Units per chiplet, clock speeds, specs or well… anything else. But remember, these products do not launch until 2021.
Ari actually did comment on this “…you can assume that this device takes advantage of all the latest and greatest technology from Intel: 2D/3D memory technology all in place. I cannot confirm, but there’s a lot of technology packed into this amazing device”
For those who want a gaming GPU and thinking of buying in 2020, Intel will be launching Xe for gaming then. It will be on the 10nm process, and from the rumors and what I’ve heard, targeting ‘mid-range’ performance for 2020.
This official information from Intel also confirms a few theories we’ve had, and also some previous rumors too. On the subject of theories – we had seen Intel accidentally release a graphics driver earlier this year with several entries for what appeared to be Xe GPUs.
There were “LP and “HP” versions, which we assumed meant Low Power and High Power, as they also seemed to correspond with the number of Execution Units on the GPU. On that particular leak, the highest-end SKU appeared to sport 512 EU – which assuming modest clock speeds should certainly be about mid-range in performance. Here’s what was spotted in the now scrubbed from the internet drivers:
- iDG1LPDEV = “Intel(R) UHD Graphics, Gen12 LP DG1” “gfx-driver-ci-master-2624”
- iDG2HP512 = “Intel(R) UHD Graphics, Gen12 HP DG2” “gfx-driver-ci-master-2624”
- iDG2HP256 = “Intel(R) UHD Graphics, Gen12 HP DG2” “gfx-driver-ci-master-2624”
- iDG2HP128 = “Intel(R) UHD Graphics, Gen12 HP DG2” “gfx-driver-ci-master-2624”
Another interesting thing – Chris Hook on Twitter confirmed that engineering sample boards of Xe are now working and being tested. We’ve also seen several of these products pass through certification online, revolving around Intel’s DG1.
The other thing this seems to confirm is a few leaks from Asraf, who used to work at the Motley Fool but was then poached by Intel. He tweeted several things which were since deleted, but a few forums grabbed the tweets.
During these tweets, he did confirm that Xe would indeed be MCM in nature and that Intel would be heavily targeting Nvidia. Rather interestingly, I’ve heard Intel was aiming at Nvidia myself from a few sources – nothing specific, just that Nvidia was in Intel’s sights – both in gaming and the data center.
During the same conference, Intel also gave some information on its Node Architecture. These nodes will be used in supercomputers such as Aurora, and high-performance high bandwidth is the order of the day here.
Each Intel node sports six Ponte Vecchio graphics units (each card holding 16 compute units…) and two Sapphire Rapids CPUs. Basically, all of the memory is unified thanks to CXL so whether its the Optane Memory, the system memory (rumored to be DDR5) or the HBM residing on the GPUs themselves.
If you rewind the clocks to the late 90s and early 2000s, there was no shortage of competition in the graphics arena. Nvidia was producing its own cards (such as the TNT line and then eventually the GeForce cards), ATI (before AMD gobbled them up) had their Radeon products, and companies such as 3DFX and Matrox competed fiercely.
More competition is definitely a good thing, and I truly hope Intel is able to offer competitive products. It will be fascinating to see the performance of Intel’s Xe cards, and how they will market these cards too.
For gamer’s, there are also questions such as what Intel’s strategy will be in regard to the production of the cards. AMD and Nvidia farm out the manufacturing of GPUs to AIBs such as MSI, Gigabyte, PowerColor, and ASUS.
Naturally, many of these AIBs Intel has ties with thanks to motherboards and other products… so whether Intel will produce the chips and then let AIBs make their own card, or instead whether it will be more how they handle CPU production and handle everything is definitely in question.
With any luck, we’ll know more soon.