Recently, there was a leak that AMD’s next-generation X570 platform (along with the Ryzen 3000 series) of processors was scheduled to launch at Computex, 2019. This information originated from the website gamer.com.tw, and the leaker claimed that this came from a Gigabyte event where it was also revealed that the next generation AM4 platform would also feature support for PCIe 4.0.
I can reveal that this information is indeed true, and several other juicy details after speaking with an individual at a company who have direct ties to AMD. I’ve no doubt that this person does indeed work with the company, but I cannot reveal their identity or the identity of the company this individual works for – for obvious reasons. The information they have provided here is accurate as of the time he spoke to me.
It was confirmed that AMD is indeed planning to launch Zen 2 at Computex 2019 and that PCIe 4.0 was indeed going to be featured on the new AM4 platform – it is also said that it (PCIe 4.0) will, of course, appear in the next generation Threadripper CPUs too. I was also told that USB 3.2 will be supported as well, which doubles the bandwidth from USB 3.1 gen 2, meaning up to 20gbps total, a welcome addition to AMD’s X570 and next-gen ThreadRipper platform for sure.
It was also confirmed that Matisse is still the working codename for the next generation AM4 platform (which isn’t too much of a surprise). Dual channel DDR4 will be supported (so no additional memory channels over what we currently have) and ‘officially’ supported speeds are up to 3200MHZ – but of course your mileage for getting faster memory running will vary. While on the subject of RAM, AMD is said to be stepping up validation and testing of memory kits internally.
With Intel, motherboard vendors are given left a greater ability to tweak and fix memory compatibility issues – so for example, if you buy G Skill memory and it doesn’t work with your shiny new Z390 motherboard at the right speeds, Gigabyte, MSI, ASUS, Biostar or whoever can tweak things on their own. With AMD, for the purposes of security, this is locked down – and for early adopters of the Ryzen processors (the first generation) you might recall how memory compatibility was hit and miss, and sometimes you would find some memory barely capable of hitting the low 2000mhz, while other RAM of the same specs would be capable of much greater speeds.
AMD has improved this memory compatibility for Ryzen over the past year or so, but they are said to be putting an even greater emphasis on this issue in the future.
So – what of backward and forwards compatibility then between the X570 and the Ryzen 3000 series, along with older boards? Well, apparently AMD want to do this still, but there is some debate internally if this is the best option. You might recall back in June of this year (2018), news broke AMD (or more accurately, motherboard vendors) were cutting Bristol Ridge support for the AM4 platform – and the reason was said to be the size of the BIOS. The max size for the BIOS on these boards is only 16MB, and having a never-ending list of supported CPUs isn’t possible.
Therefore, adding all of the APUs, CPUs for both the first and second generation of Ryzen to the X570 boards is being heavily debated. It was also implied that there might be other reasons too – not only does the chipset have more features (I am certain about USB 3.2 and PCI-E 4.0, there might be others – I am trying to find this out) but there are phase issues too.
For those unfamiliar with what a ‘phase’ is, CPUs rely on power to run (obviously) but that power isn’t the same voltage that comes in from the PSU. The job of phases is to turn the 12V input of the PSU into a usable voltage for the processor (which is typically around 1 – 1.5V, depending on the generation of the processor if you’re overclocking, whether its a desktop or mobile device and so on).
Without getting super technical as it is outside the scope of this article, additional phases ‘smooth’ out the power distribution to the processor, which is important for the purposes of stability, both as core counts scale upwards and higher frequencies are reached. So with a multi-phase design, the ‘load’ of power is smoother, and you can think of it (if you want an analogy) of a half-life for medication. You take a pill and then the half-life for the pill could be 4 hours, so after 4 hours the pill only has 50 percent of the drug left in your system.
credit – https://en.wikichip.org/wiki/voltage_regulator_module
So if you’re taking antibiotics, you take the pills evenly spaced out to consistently keep the medication in your body… phases work similarly here, only instead of antibiotics, you’re feeding the processor power. The trick is to overlap phases with a slight offset, so that as one phase ‘drops’ its voltage to the CPU the next phase does its thing. You can see the above illustration on how the it creates a smoother line, compared to how each of the peaks (for example, phase 1) would look if it worked in isolation.
https://www.youtube.com/watch?v=sy61aucMPHk
And this all comes down to… additional processor cores. AMD has yet to decide on the number of CPU cores for the AM4 platform, but they are targetting at LEAST 12 cores, and could possibly aim for up to 16 cores. The big challenge right now is designing the package, keeping it cool and deciding market segmentation. I am yet to find further details concerning the layout of the caches and other architecture changes (I am trying to find that information out) but I have been told that AMD’s figure of 29 percent IPC is indeed achievable in real-world tests, but it is (as they themselves pointed out) purely for best case scenarios. The rumor of around 10 – 15 percent on average appears to be more accurate, and clock frequencies are something they are internally still testing and trying to decide.
We do know quite a few details through official press releases, interviews and events from AMD regarding the Zen 2 architecture. We do know that Improved Branch Prediction, Instruction Pre-Fetching, micro-op cache and other changes will drastically increase the processors’ overall throughput. Naturally, these architecture changes have fantastic potential for the Ryzen 3000 series CPUs, known as Matisse.
We do know that AMD’s ROME CPU, which is the second generation EPYC server processors will be up to 64 cores per socket – so up to 128 threads (thanks to SMT).
If I had to speculate (and this is not something I was told), it is likely going to depend upon the number of processor cores and the balance between power and heat. It was also heavily implied that another reason was motherboard production costs – in particular, the rather popular B550 series. More CPU phases increase cost, and if I had to guess, AMD doesn’t want to run the risk of raising the cost too much for motherboard vendors (as that would increase cost for the end user, thus hurting the reduced cost for motherboards, a current advantage AMD enjoys over Intel).
AMD also know there’s a good chance someone will pair a Zen 2 16 core processor (if they went that high) with a cheap motherboard, and there’s always the risk that it could go bang. So balancing production costs for boards, clock frequencies, heat output and more are currently the deciding factor for the company.
I was also told that the company is trying their best to reduce inter-core latency compared to Zen or Zen+ and that is one of their highest priorities currently – but exact details weren’t given during our conversation. Clearly given that gaming is a very lucrative market, striving for the highest possible clock frequencies, while also maintaining the highest number of cores and bandwidth are critical for the success of the processor.
AMD is also said to be tweaking the Threadripper 2 platform (with PCIe 4 and USB 3.2) plus a few other changes, but the core count right now is likely going to stay at 32 cores, but apparently, it might be increased. AMD appears to be relying on increased IO (such as faster memory bandwidth) of the HEDT platform as one reason to nudge folks to the purchase of ThreadRipper.
My source was also less sure about the GPU side of the equation, but believes they are planning to launch a graphics card during Computex too. He doesn’t work directly with AMD’s graphics division, so isn’t certain about the specs of the upcoming graphics card, but has said that AMD is planning to ensure they have a complete product offering (new CPU, GPU, and motherboards) for that.
From his knowledge, Intel isn’t able to respond correctly. Oh yeah – my source also confirmed Comet Lake-S exists too. and that it would be a ten core processor. He knows a lot less about the 10-core CPU from Intel, only that the company is definitely said to be worried about being able to respond to AMD. AMD is apparently content to play the core count game for now for the Ryzen 3000 series – it makes sense for marketing and pushes the strength of their Infinity Fabric technology and 7nm process.
My only concern (and something he cannot answer yet as the chips are not even slightly finished for the desktop variants) is how the performance will scale to AM4 with 16 cores and only dual channel memory. It was speculated during our discussion that memory frequency will be of critical importance, and AMD is, of course, making various changes in their architecture for Zen 2 which should help with this some (such as the aforementioned reduced latencies), but whether or not this will be sufficient for heavy multi-tasking isn’t yet clear.
Assuming AMD do manage a 10 percent IPC bump, along with a clock speed of around 4.5GHZ for Zen 2 on the consumer end, it will be a very difficult battle for Intel. In recent testing, we demonstrated how an Intel I9-9900K is only slightly better than a Ryzen 7 2700X in single thread tasks, but in multi-threading, they’re essentially even at the same clock speeds. Intel’s Coffee Lake architecture though does win when left to run at up to 5GHz (its stock frequency), a speed which AMD is yet to be able to achieve.
But with higher frequencies, more cores, better IPC and other tweaks to the architecture – it will be a fascinating thing how Intel responds.
